Get Low-Voltage CMOS Log Companding Analog Design (The Springer PDF

By Francisco Serra-Graells,Adoración Rueda,José L. Huertas

ISBN-10: 140207445X

ISBN-13: 9781402074455

ISBN-10: 1441953531

ISBN-13: 9781441953537

Low-Voltage CMOS Log Companding Analog Design offers in element state of the art analog circuit thoughts for the very low-voltage and low-power layout of systems-on-chip in CMOS applied sciences. The proposed technique is principally in response to bases: the immediate Log Companding conception, and the MOSFET working within the subthreshold sector. the previous permits internal compression of the voltage dynamic-range for extraordinarily low-voltage operation, whereas the latter is appropriate with CMOS applied sciences and appropriate for low-power circuits. the mandatory history at the particular modeling of the MOS transistor for Companding is equipped before everything. Following this basic strategy, an entire set of CMOS simple development blocks is proposed and analyzed for a large choice of analog sign processing. specifically, the coated components comprise: amplification and AGC, arbitrary filtering, PTAT new release, and pulse length modulation (PDM). for every subject, numerous case reviews are thought of to illustrate the layout technique. additionally, built-in examples in 1.2um and 0.35um CMOS applied sciences are suggested to ensure the nice contract among layout equations and experimental facts. The ensuing analog circuit topologies show very low-voltage (i.e. 1V) and low-power (few tenths of uA) services. except those particular layout examples, a true business program within the box of listening to aids is additionally provided because the major demonstrator of all of the proposed simple development blocks. This system-on-chip indicates real 1V operation, excessive flexibility via electronic programmability and intensely low-power intake (about 300uA together with the Class-D amplifier). As a consequence, the mentioned ASIC can meet the requirements of an entire relatives of universal listening to reduction versions. In end, this publication is addressed to either ASIC designers who can practice its contents to the synthesis of very low-power systems-on-chip in normal CMOS applied sciences, in addition to to the academics of recent circuit layout in digital engineering.

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Low-Voltage CMOS Log Companding Analog Design (The Springer International Series in Engineering and Computer Science) by Francisco Serra-Graells,Adoración Rueda,José L. Huertas

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